Thread (10 messages) 10 messages, 3 authors, 3h ago

Re: [PATCH 0/4] powerpc/topology: Introduce llc_override debugfs

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From: Srikar Dronamraju <hidden>
Date: 2026-10-12 12:19:49
Also in: lkml

* Shrikanth Hegde [off-list ref] [2026-10-12 15:50:33]:


Hi Shrikanth,
There is a new feature in scheduler called as Cache Aware Scheduling [1].
It tries to keep related tasks within the same LLC domain while
keeping the system reasonably balanced.

Cache Aware Scheduling assumes that the scheduler LLC domain is large enough
to be a useful placement target. This is true on many systems where an LLC spans
several cores, but not on PowerPC systems where the scheduler-visible LLC is at
the SMT level. In that case, sd_llc_size is effectively the SMT width.
Can we add a reference to the earlier attempt to try MCLLC a few years back.

-- 
Thanks and Regards
Srikar Dronamraju
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