Re: [PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

On Thu, Aug 06, 2026 at 10:20:02PM +0530, Shivaprasad G Bhat wrote:

On 8/5/26 10:48 PM, Bjorn Helgaas wrote:

quoted

On Wed, Aug 05, 2026 at 06:21:32PM +0530, Avinash Roy wrote:

quoted

From: Shivaprasad G Bhat <redacted>

The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
reset method for reliable EEH recovery on pSeries/ppc64 platforms.

FLR alone is insufficient because it does not re-initialize the Spyre
firmware state machine. On ppc64 with EEH enabled,
pcibios_set_pcie_reset_state() is overridden in
arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
EEH PE operations, which is the correct mechanism for full device
recovery after an EEH event.

This makes it sound like this mechanism is needed for EEH recovery for
*all* devices, not just Spyre.  If that's the case it sounds like we
need more than just a Spyre-specific quirk.

Now I re-read it, The second statement needs to be re-worded. It does sound
like its true for all devices. Quirk is only for the Spyre card.

So I guess this is related to some Spyre erratum?  Per spec, FLR is
supposed to "set all Function-specific state machines to their
initialization values" (PCIe r7.0, sec 6.6.2).