Re: [PATCH v4 1/1] powerpc: enable dynamic preemption

On Thu, Jul 30, 2026 at 10:26:58AM -0700, Paul E. McKenney wrote:

On Thu, Jul 30, 2026 at 10:40:38PM +0530, Shrikanth Hegde wrote:

quoted

Barrier are in core implementation, not in arch specific.

"Compiler barrier"s are not actually a thing, it is not a barrier for
anything.  It's just telling the compiler that at the point of the
"barrier" all the registers should hold the values that they
conceptually do also *actually*.

(In theory the compiler can sometimes prove it can do things that do not
even guarantee that, but in practice this holds).

But barrier() is just "__asm__ __volatile__("": : :"memory")", which
does not emit any instructions.  Or is this doing more machine-register
flushing/restoring than one might expect?

(__volatile__ is redundant, any asm without outputs is always counted as
volatile.  If this wasn't true, GCC could always delete any such asm,
since it has no side effects at all!

People often think "volatile" asm is some magic that prohibits the
compiler from optimising stuff, but it is not, it has very contrained
and very specific meaning).

Nope.  The "memory" clobber says that all memory can be read and written
in that asm, so any value that conceptually resides in memory there
should have a stable value there.  This can trigger some save/restore
stuff, sure, but on all Power ABIs we have actual registers for pretty
much everything, so nothing at all is done here.


Segher