[PATCH v3 13/16] PCI: dwc: spacemit-k1: Use cached PCIe capability offset
From: Hans Zhang <18255117159@163.com>
Date: 2026-07-20 15:08:24
Also in:
imx, linux-amlogic, linux-arm-msm, linux-pci, linux-riscv, linux-rockchip, linux-tegra, lkml, spacemit
Subsystem:
pci native host bridge and endpoint drivers, pci subsystem, the rest · Maintainers:
Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Linus Torvalds
Because .init runs before core caching, we call dw_pcie_get_pcie_cap()
inside k1_pcie_disable_aspm_l1() to get the capability base, then add
PCI_EXP_LNKCAP. Hardware is already enabled at this point.
Signed-off-by: Hans Zhang <18255117159@163.com>
---
In pcie-spacemit-k1, the call chain is:
static const struct dw_pcie_host_ops k1_pcie_host_ops = {
.init = k1_pcie_init,
};
k1_pcie_init()
-> k1_pcie_disable_aspm_l1()
-> dw_pcie_find_capability()
---
drivers/pci/controller/dwc/pcie-spacemit-k1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-spacemit-k1.c b/drivers/pci/controller/dwc/pcie-spacemit-k1.c
index 04241df8fd59..3e741324f44a 100644
--- a/drivers/pci/controller/dwc/pcie-spacemit-k1.c
+++ b/drivers/pci/controller/dwc/pcie-spacemit-k1.c@@ -116,7 +116,7 @@ static void k1_pcie_disable_aspm_l1(struct k1_pcie *k1) u8 offset; u32 val; - offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); + offset = dw_pcie_get_pcie_cap(pci); offset += PCI_EXP_LNKCAP; dw_pcie_dbi_ro_wr_en(pci);
--
2.34.1