On Fri, Jun 12, 2026 at 02:50:17PM +0300, Ilpo Järvinen wrote:

On Wed, 29 Apr 2026, Ilpo Järvinen wrote:

quoted

pci_resource_alignment() does not consider bridge windows special,
yet their alignment is subject to different requirements from BAR
alignment.

Add lower bound to bridge window alignment to help callers out to
always have large enough alignment.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Hi Bjorn,

Could you please pull this change and the subsequent one, the commits in 
pci/resource:

ae09d28ecbbc ("PCI: Lower bound bridge window alignment")
cf996b886675 ("PCI: Return valid alignment for assigned resources")

Sure, I dropped these two patches from pci/resource.  The rest are
still heading to v7.2.  Thanks!

The rest of the changes in this series seem okay and can proceed if you're 
okay with keeping a partial series.

The reason for this request is the dev->bus vs dev->subordinate issue 
sashiko mentioned in its review.

I've tried to come up with a solution to that but it has become so ugly
I have not been very happy with it. Maybe there's no other way but the 
problem boils down with pci_min_window_alignment() having to be capable of 
dealing two cases, each lacking one of the key pointers (bus or bridge 
dev):

1) root bus without bus->self
2) bridge without a subordinate bus struct (if subordinate bus' alloc 
   failed)

Only way to solve that I could think of is passing both the bus and the 
bridge device to pci_min_window_alignment() and the related arch side 
function pcibios_window_alignment(). The ugliest parts then involve 
getting a bus pointer compatible with both of those cases, like this:

	struct pci_controller *phb = pci_bus_to_host(bus ? bus : bridge->bus);

But it's too late in the cycle now to try even that, IMO, so better to 
wait to the next cycle.

-- 
 i.