[PATCH v3 2/7] MIPS: PCI: Use contextual data instead of global variable
From: Thierry Reding <hidden>
Date: 2025-10-29 16:33:49
Also in:
linux-acpi, linux-arm-kernel, linux-mips, linux-pci, linux-riscv, linux-sh, lkml, loongarch
Subsystem:
mips, the rest · Maintainers:
Thomas Bogendoerfer, Linus Torvalds
From: Thierry Reding <redacted> Pass the driver-specific data via the syscore struct and use it in the syscore ops. Signed-off-by: Thierry Reding <redacted> --- Changes in v3: - adjust for API changes and update commit message Changes in v2: - remove unused global variable arch/mips/pci/pci-alchemy.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 6bfee0f71803..f73bf60bd069 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c@@ -33,6 +33,7 @@ struct alchemy_pci_context { struct pci_controller alchemy_pci_ctrl; /* leave as first member! */ + struct syscore syscore; void __iomem *regs; /* ctrl base */ /* tools for wired entry for config space access */ unsigned long last_elo0;
@@ -46,12 +47,6 @@ struct alchemy_pci_context { int (*board_pci_idsel)(unsigned int devsel, int assert); }; -/* for syscore_ops. There's only one PCI controller on Alchemy chips, so this - * should suffice for now. - */ -static struct alchemy_pci_context *__alchemy_pci_ctx; - - /* IO/MEM resources for PCI. Keep the memres in sync with fixup_bigphys_addr * in arch/mips/alchemy/common/setup.c */
@@ -306,9 +301,7 @@ static int alchemy_pci_def_idsel(unsigned int devsel, int assert) /* save PCI controller register contents. */ static int alchemy_pci_suspend(void *data) { - struct alchemy_pci_context *ctx = __alchemy_pci_ctx; - if (!ctx) - return 0; + struct alchemy_pci_context *ctx = data; ctx->pm[0] = __raw_readl(ctx->regs + PCI_REG_CMEM); ctx->pm[1] = __raw_readl(ctx->regs + PCI_REG_CONFIG) & 0x0009ffff;
@@ -328,9 +321,7 @@ static int alchemy_pci_suspend(void *data) static void alchemy_pci_resume(void *data) { - struct alchemy_pci_context *ctx = __alchemy_pci_ctx; - if (!ctx) - return; + struct alchemy_pci_context *ctx = data; __raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM); __raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH);
@@ -359,10 +350,6 @@ static const struct syscore_ops alchemy_pci_syscore_ops = { .resume = alchemy_pci_resume, }; -static struct syscore alchemy_pci_syscore = { - .ops = &alchemy_pci_syscore_ops, -}; - static int alchemy_pci_probe(struct platform_device *pdev) { struct alchemy_pci_platdata *pd = pdev->dev.platform_data;
@@ -480,9 +467,10 @@ static int alchemy_pci_probe(struct platform_device *pdev) __raw_writel(val, ctx->regs + PCI_REG_CONFIG); wmb(); - __alchemy_pci_ctx = ctx; platform_set_drvdata(pdev, ctx); - register_syscore(&alchemy_pci_syscore); + ctx->syscore.ops = &alchemy_pci_syscore_ops; + ctx->syscore.data = ctx; + register_syscore(&ctx->syscore); register_pci_controller(&ctx->alchemy_pci_ctrl); dev_info(&pdev->dev, "PCI controller at %ld MHz\n",
--
2.51.0