Thread (15 messages) 15 messages, 4 authors, 2023-12-13

Re: [PATCH v4 0/5] powerpc/smp: Topology and shared processor optimizations

From: Srikar Dronamraju <hidden>
Date: 2023-11-15 06:16:46
Also in: lkml

* Aneesh Kumar K.V [off-list ref] [2023-11-15 11:24:59]:
Srikar Dronamraju [off-list ref] writes:
quoted
PowerVM systems configured in shared processors mode have some unique
challenges. Some device-tree properties will be missing on a shared
processor. Hence some sched domains may not make sense for shared processor
systems.

Most shared processor systems are over-provisioned. Underlying PowerVM
Hypervisor would schedule at a Big Core granularity. The most recent power
processors support two almost independent cores. In a lightly loaded
condition, it helps the overall system performance if we pack to lesser
number of Big Cores.
Is this good to do if the systems are not over-provisioned? What will be
the performance impact in that case with and without the change?
We are consolidating 1 thread per thread group (aka SMT domain).
Since each thread-group is suppose to be independent including having a
private L1/L2/L3 cache, we expect minimal impact in non over provisioned
scenario.

In Over utilization scenario, the changes in this patchset will not even kick in.

-- 
Thanks and Regards
Srikar Dronamraju
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