Re: [PATCH 0/6] KVM: PPC: Book3S HV interrupt fixes
From: Michael Ellerman <hidden>
Date: 2022-05-24 10:56:45
On Thu, 3 Mar 2022 15:33:09 +1000, Nicholas Piggin wrote:
This series fixes up a bunch of little interrupt issues which were found by inspection haven't seem to have caused big problems but possibly could or could cause the occasional latency spike from a temporarily lost interrupt. The big thing is the xive context change. Currently we run an L2 with its L1's xive OS context pushed. I'm proposing that we instead treat that as an escalation similar to cede. [...]
Patches 2-6 applied to powerpc/topic/ppc-kvm.
[2/6] KVM: PPC: Book3S HV P9: Inject pending xive interrupts at guest entry
https://git.kernel.org/powerpc/c/026728dc5d41f830e8194fe01e432dd4eb9b3d9a
[3/6] KVM: PPC: Book3S HV P9: Move cede logic out of XIVE escalation rearming
https://git.kernel.org/powerpc/c/ad5ace91c55e7bd16813617f67bcb7619d51a295
[4/6] KVM: PPC: Book3S HV P9: Split !nested case out from guest entry
https://git.kernel.org/powerpc/c/42b4a2b347b09e7ee4c86f7121e3b45214b63e69
[5/6] KVM: PPC: Book3S HV Nested: L2 must not run with L1 xive context
https://git.kernel.org/powerpc/c/11681b79b1ab52e7625844d7ce52c4d5201a43b2
[6/6] KVM: PPC: Book3S HV Nested: L2 LPCR should inherit L1 LPES setting
https://git.kernel.org/powerpc/c/2852ebfa10afdcefff35ec72c8da97141df9845c
cheers