Re: [PATCH v4 5/8] PCI/DPC: Converge EDR and DPC Path of clearing AER registers

On Thu, Oct 21, 2021 at 10:23:30PM +0530, Naveen Naidu wrote:

On 20/10, Bjorn Helgaas wrote:

quoted

On Tue, Oct 05, 2021 at 10:48:12PM +0530, Naveen Naidu wrote:

quoted

quoted

In EDR path, AER status registers are cleared irrespective of whether
the error was an RP PIO or unmasked uncorrectable error. But in DPC, the
AER status registers are cleared only when it's an unmasked uncorrectable
error.

This leads to two different behaviours for the same task (handling of
DPC errors) in FFS systems and when native OS has control.

FFS?

Firmware First Systems

I assumed that's what it was, but it's helpful to use the same terms
used by the specs to make things easier to find.  I don't think it's
actually the case that "Firmware First" necessary applies to the
entire system, since the ACPI FIRMWARE_FIRST flag is a per-error
source thing, not a per-system thing.