[PATCH kernel] powerps/pseries/dma: Add support for 2M IOMMU page size

The upcoming PAPR spec adds a 2M page size, bit 23 right after the 16G
page
size in the "ibm,query-pe-dma-window" call.

This adds support for the new page size. Since the new page size is out
of sorted order, this changes the loop to not assume that shift[] is
sorted.

Signed-off-by: Alexey Kardashevskiy <redacted>
---

This might not work if PHYP keeps rejecting new window requests for
less
than 32768 TCEs. This is needed:
https://github.com/aik/linux/commit/8cc8fa5ba5b3b4a18efbc9d81d9e5b85ca7c8a95


---
 arch/powerpc/platforms/pseries/iommu.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/iommu.c

b/arch/powerpc/platforms/pseries/iommu.c
index c741689a5165..237bf405b0cb 100644

--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c

@@ -1159,14 +1159,15 @@ static void reset_dma_window(struct pci_dev

*dev, struct device_node *par_dn)
 /* Return largest page shift based on "IO Page Sizes" output of
ibm,query-pe-dma-window. */
 static int iommu_get_page_shift(u32 query_page_size)
 {
-       /* Supported IO page-sizes according to LoPAR */
+       /* Supported IO page-sizes according to LoPAR, note that 2M is
out of order */
        const int shift[] = {
                __builtin_ctzll(SZ_4K),   __builtin_ctzll(SZ_64K),
__builtin_ctzll(SZ_16M),
                __builtin_ctzll(SZ_32M),  __builtin_ctzll(SZ_64M),
__builtin_ctzll(SZ_128M),
-               __builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G)
+               __builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G),
__builtin_ctzll(SZ_2M)
        };
 
        int i = ARRAY_SIZE(shift) - 1;
+       int ret = 0;
 
        /*
         * On LoPAR, ibm,query-pe-dma-window outputs "IO Page Sizes"
using a bit field:

@@ -1176,11 +1177,10 @@ static int iommu_get_page_shift(u32

query_page_size)
         */
        for (; i >= 0 ; i--) {
                if (query_page_size & (1 << i))
-                       return shift[i];
+                       ret = max(ret, shift[i]);
        }
 
-       /* No valid page size found. */
-       return 0;
+       return ret;
 }
 
 static struct property *ddw_property_create(const char *propname, u32
liobn, u64 dma_addr,

This might not work if PHYP keeps rejecting new window requests for less
than 32768 TCEs. This is needed:
https://github.com/aik/linux/commit/8cc8fa5ba5b3b4a18efbc9d81d9e5b85ca7c8a95


---
  arch/powerpc/platforms/pseries/iommu.c | 10 +++++-----
  1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index c741689a5165..237bf405b0cb 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c

@@ -1159,14 +1159,15 @@ static void reset_dma_window(struct pci_dev *dev, struct device_node *par_dn)
  /* Return largest page shift based on "IO Page Sizes" output of ibm,query-pe-dma-window. */
  static int iommu_get_page_shift(u32 query_page_size)
  {
-	/* Supported IO page-sizes according to LoPAR */
+	/* Supported IO page-sizes according to LoPAR, note that 2M is out of order */
  	const int shift[] = {
  		__builtin_ctzll(SZ_4K),   __builtin_ctzll(SZ_64K), __builtin_ctzll(SZ_16M),
  		__builtin_ctzll(SZ_32M),  __builtin_ctzll(SZ_64M), __builtin_ctzll(SZ_128M),
-		__builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G)
+		__builtin_ctzll(SZ_256M), __builtin_ctzll(SZ_16G), __builtin_ctzll(SZ_2M)
  	};
  
  	int i = ARRAY_SIZE(shift) - 1;
+	int ret = 0;
  
  	/*
  	 * On LoPAR, ibm,query-pe-dma-window outputs "IO Page Sizes" using a bit field:

@@ -1176,11 +1177,10 @@ static int iommu_get_page_shift(u32 query_page_size)
  	 */
  	for (; i >= 0 ; i--) {
  		if (query_page_size & (1 << i))
-			return shift[i];
+			ret = max(ret, shift[i]);
  	}
  
-	/* No valid page size found. */
-	return 0;
+	return ret;
  }
  
  static struct property *ddw_property_create(const char *propname, u32 liobn, u64 dma_addr,