Re: [PATCH v6 00/11] DDW + Indirect Mapping

On 8/16/21 11:39 PM, Leonardo Bras wrote:

So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and does not
allow IOMMU pages bigger than 64K, it has to limit the number of TCEs
per a PE to limit waste of physical pages.

As of today, if the assumed direct mapping is not possible, DDW creation
is skipped and the default DMA window "ibm,dma-window" is used instead.

Using the DDW instead of the default DMA window may allow to expand the
amount of memory that can be DMA-mapped, given the number of pages (TCEs)
may stay the same (or increase) and the default DMA window offers only
4k-pages while DDW may offer larger pages (4k, 64k, 16M ...).

So if I'm reading this correctly, VFIO applications requiring hugepage 
DMA mappings (e.g. 16M or 2GB) can be supported on an LPAR or DLPAR 
after this change, is that correct?  Any limitations based on processor 
or pHyp revision levels?

Dave