[PATCH v2 3/3] powerpc: Define and use MSR_RI only on non booke/40x
From: Christophe Leroy <hidden>
Date: 2021-08-19 15:21:20
Also in:
lkml
Subsystem:
linux for powerpc (32-bit and 64-bit), the rest · Maintainers:
Madhavan Srinivasan, Michael Ellerman, Linus Torvalds
40x and BOOKE don't have MSR_RI. Define MSR_RI only for platforms where it exists. For the other ones, defines it as BUILD_BUG for C and do not define it for ASM. Signed-off-by: Christophe Leroy <redacted> --- arch/powerpc/include/asm/reg.h | 4 ++++ arch/powerpc/include/asm/reg_booke.h | 6 +++--- arch/powerpc/kernel/head_32.h | 4 ++++ arch/powerpc/kernel/process.c | 2 +- arch/powerpc/lib/sstep.c | 2 +- 5 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index be85cf156a1f..656a9aaa1e8e 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h@@ -109,7 +109,11 @@ #ifndef MSR_PMM #define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */ #endif +#if !defined(CONFIG_BOOKE) && !defined(CONFIG_40x) #define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ +#elif !defined(__ASSEMBLY__) +#define MSR_RI ({BUILD_BUG(); 0; }) +#endif #define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ #define MSR_TM __MASK(MSR_TM_LG) /* Transactional Mem Available */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 17b8dcd9a40d..6f40a8420ad0 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h@@ -38,15 +38,15 @@ #if defined(CONFIG_PPC_BOOK3E_64) #define MSR_64BIT MSR_CM -#define MSR_ (MSR_ME | MSR_RI | MSR_CE) +#define MSR_ (MSR_ME | MSR_CE) #define MSR_KERNEL (MSR_ | MSR_64BIT) #define MSR_USER32 (MSR_ | MSR_PR | MSR_EE) #define MSR_USER64 (MSR_USER32 | MSR_64BIT) #elif defined (CONFIG_40x) -#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE) +#define MSR_KERNEL (MSR_ME|MSR_IR|MSR_DR|MSR_CE) #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) #else -#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE) +#define MSR_KERNEL (MSR_ME|MSR_CE) #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) #endif
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
index 6b1ec9e3541b..6c5f4183dc8e 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_32.h@@ -63,7 +63,11 @@ mtspr SPRN_DAR, r11 /* Tag DAR, to be used in DTLB Error */ .endif #endif +#ifdef CONFIG_40x + LOAD_REG_IMMEDIATE(r11, MSR_KERNEL) /* re-enable MMU */ +#else LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~MSR_RI) /* re-enable MMU */ +#endif mtspr SPRN_SRR1, r11 lis r11, 1f@h ori r11, r11, 1f@l
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 185beb290580..5ba72e31de28 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c@@ -1420,7 +1420,7 @@ static struct regbit msr_bits[] = { {MSR_IR, "IR"}, {MSR_DR, "DR"}, {MSR_PMM, "PMM"}, -#ifndef CONFIG_BOOKE +#if !defined(CONFIG_BOOKE) && !defined(CONFIG_40x) {MSR_RI, "RI"}, {MSR_LE, "LE"}, #endif
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index d8d5f901cee1..357cc1fb4f67 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c@@ -3559,7 +3559,7 @@ int emulate_step(struct pt_regs *regs, struct ppc_inst instr) case MTMSR: val = regs->gpr[op.reg]; - if ((val & MSR_RI) == 0) + if (cpu_has_msr_ri() && (val & MSR_RI) == 0) /* can't step mtmsr[d] that would clear MSR_RI */ return -1; /* here op.val is the mask of bits to change */
--
2.25.0