Thread (17 messages) flat view 17 messages, 2 authors, 2021-06-16

Re: [PATCH v3 03/11] powerpc/64s: avoid reloading (H)SRR registers if they are still valid

From: Michael Ellerman <mpe@ellerman.id.au>
Date: 2021-06-15 13:42:44

Nicholas Piggin [off-list ref] writes:
quoted hunk ↗ jump to hunk
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 2c57ece6671c..44526c157bff 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -103,6 +103,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
 	ori	r12,r12,MSR_FP
 	or	r12,r12,r4
 	std	r12,_MSR(r1)
+	li	r4,0
+	stb	r4,PACASRR_VALID(r13)
 #endif
 	li	r4,1
 	stb	r4,THREAD_LOAD_FP(r5)
This didn't build for 64e. I changed it to:

#ifdef CONFIG_PPC_BOOK3S_64
	li	r4,0
	stb	r4,PACASRR_VALID(r13)
#endif


And similarly for vector.S.

cheers
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