[RFC PATCH 7/7] [not for merge] mm: increase SECTION_SIZE_BITS to 31
From: Zi Yan <hidden>
Date: 2021-05-06 15:29:03
Also in:
linux-mm, lkml
Subsystem:
the rest, x86 architecture (32-bit and 64-bit) · Maintainers:
Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen
From: Zi Yan <ziy@nvidia.com> This is only used to test onlining/offlining subsection memory in a x86_64 system by increasing section size to 2GB and pageblock size to 1GB when MAX_ORDER is set to 20. Signed-off-by: Zi Yan <ziy@nvidia.com> --- arch/x86/Kconfig | 15 +++++++++++++++ arch/x86/include/asm/sparsemem.h | 2 +- 2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 0045e1b44190..d8faf59fa5ff 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig@@ -1654,6 +1654,21 @@ config X86_PMEM_LEGACY Say Y if unsure. +config FORCE_MAX_ZONEORDER + int "Maximum zone order" + range 11 20 + default "20" + help + The kernel memory allocator divides physically contiguous memory + blocks into "zones", where each zone is a power of two number of + pages. This option selects the largest power of two that the kernel + keeps in the memory allocator. If you need to allocate very large + blocks of physically contiguous memory, then you may need to + increase this value. + + This config option is actually maximum order plus one. For example, + a value of 11 means that the largest free memory block is 2^10 pages. + config HIGHPTE bool "Allocate 3rd-level pagetables from highmem" depends on HIGHMEM
diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h
index 6a9ccc1b2be5..c5a9d498a7e7 100644
--- a/arch/x86/include/asm/sparsemem.h
+++ b/arch/x86/include/asm/sparsemem.h@@ -23,7 +23,7 @@ # define MAX_PHYSMEM_BITS 32 # endif #else /* CONFIG_X86_32 */ -# define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ +# define SECTION_SIZE_BITS 31 /* matt - 128 is convenient right now */ # define MAX_PHYSMEM_BITS (pgtable_l5_enabled() ? 52 : 46) #endif
--
2.30.2