[PATCH v6 8/9] xtensa: qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32
From: guoren@kernel.org
Date: 2021-03-31 14:33:28
Also in:
linux-arch, linux-riscv, lkml, sparclinux
Subsystem:
tensilica xtensa port (xtensa), the rest · Maintainers:
Chris Zankel, Max Filippov, Linus Torvalds
From: Guo Ren <redacted> We don't have native hw xchg16 instruction, so let qspinlock generic code to deal with it. Using the full-word atomic xchg instructions implement xchg16 has the semantic risk for atomic operations. This patch cancels the dependency of on qspinlock generic code on architecture's xchg16. Signed-off-by: Guo Ren <redacted> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> --- arch/xtensa/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 9ad6b7b82707..f19d780638f7 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig@@ -9,6 +9,7 @@ config XTENSA select ARCH_HAS_DMA_SET_UNCACHED if MMU select ARCH_USE_QUEUED_RWLOCKS select ARCH_USE_QUEUED_SPINLOCKS + select ARCH_USE_QUEUED_SPINLOCKS_XCHG32 select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_TABLE_SORT
--
2.17.1