On 18-Nov-2020, at 10:02 AM, Michael Ellerman [off-list ref] wrote:

Athira Rajeev [off-list ref] writes:

quoted

In Power9, L2/L3 bus events are always available as a
"bank" of 4 events. To obtain the counts for any of the
l2/l3 bus events in a given bank, the user will have to
program PMC4 with corresponding l2/l3 bus event for that
bank.

Commit 59029136d750 ("powerpc/perf: Add constraints for power9 l2/l3 bus events")
enforced this rule in Power9. But this is not valid for
Power10, since in Power10 Monitor Mode Control Register2
(MMCR2) has bits to configure l2/l3 event bits. Hence remove
this PMC4 constraint check from power10.

Since the l2/l3 bits in MMCR2 are not per-pmc, patch handles
group constrints checks for l2/l3 bits in MMCR2.

quoted

Patch also updates constraints for threshold events in power10.

That should be done in a separate patch please.

Thanks mpe for checking the patch set.
 
Sure, 
I will make threshold constraint changes as a separate patch and send next version

cheers