Re: [PATCH V2] powerpc/perf: Exclude pmc5/6 from the irrelevant PMU group constraints
From: Madhavan Srinivasan <maddy@linux.ibm.com>
Date: 2020-09-22 06:55:47
On 9/21/20 12:40 PM, Athira Rajeev wrote:
PMU counter support functions enforces event constraints for group of events to check if all events in a group can be monitored. Incase of event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ), not all constraints are applicable, say the threshold or sample bits. But current code includes pmc5 and pmc6 in some group constraints (like IC_DC Qualifier bits) which is actually not applicable and hence results in those events not getting counted when scheduled along with group of other events. Patch fixes this by excluding PMC5/6 from constraints which are not relevant for it.
Changes looks fine to me. Reviewed-by: Madhavan Srinivasan <maddy@linux.ibm.com> we need to CC this in Stable too.
quoted hunk ↗ jump to hunk
Fixes: 7ffd948 ("powerpc/perf: factor out power8 pmu functions") Signed-off-by: Athira Rajeev <redacted> --- Changes in v2: - Added a block comment in the fix path explaining why the change is needed. arch/powerpc/perf/isa207-common.c | 10 ++++++++++ 1 file changed, 10 insertions(+)diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 964437a..12153da 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c@@ -288,6 +288,15 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) mask |= CNST_PMC_MASK(pmc); value |= CNST_PMC_VAL(pmc); + + /* + * PMC5 and PMC6 are used to count cycles and instructions + * and these doesnot support most of the constraint bits. + * Add a check to exclude PMC5/6 from most of the constraints + * except for ebb/bhrb. + */ + if (pmc >= 5) + goto ebb_bhrb; } if (pmc <= 4) {@@ -357,6 +366,7 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) } } +ebb_bhrb: if (!pmc && ebb) /* EBB events must specify the PMC */ return -1;