Re: [PATCH v2 04/10] powerpc/perf: Add power10_feat to dt_cpu_ftrs
From: Michael Ellerman <mpe@ellerman.id.au>
Date: 2020-07-08 11:14:45
Athira Rajeev [off-list ref] writes:
quoted hunk ↗ jump to hunk
From: Madhavan Srinivasan <maddy@linux.ibm.com> Add power10 feature function to dt_cpu_ftrs.c along with a power10 specific init() to initialize pmu sprs. Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> --- arch/powerpc/include/asm/reg.h | 3 +++ arch/powerpc/kernel/cpu_setup_power.S | 7 +++++++ arch/powerpc/kernel/dt_cpu_ftrs.c | 26 ++++++++++++++++++++++++++ 3 files changed, 36 insertions(+)diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 21a1b2d..900ada1 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h@@ -1068,6 +1068,9 @@ #define MMCR0_PMC2_LOADMISSTIME 0x5 #endif +/* BHRB disable bit for PowerISA v3.10 */ +#define MMCRA_BHRB_DISABLE 0x0000002000000000 + /* * SPRG usage: *diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index efdcfa7..e8b3370c 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S@@ -233,3 +233,10 @@ __init_PMU_ISA207: li r5,0 mtspr SPRN_MMCRS,r5 blr + +__init_PMU_ISA31: + li r5,0 + mtspr SPRN_MMCR3,r5 + LOAD_REG_IMMEDIATE(r5, MMCRA_BHRB_DISABLE) + mtspr SPRN_MMCRA,r5 + blr
This doesn't seem like it belongs in this patch. It's not called? cheers