Excerpts from Mathieu Desnoyers's message of July 7, 2020 9:25 pm:

----- On Jul 7, 2020, at 1:50 AM, Nicholas Piggin npiggin@gmail.com wrote:

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Excerpts from Christophe Leroy's message of July 6, 2020 7:53 pm:

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Le 06/07/2020 à 04:18, Nicholas Piggin a écrit :

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diff --git a/arch/powerpc/include/asm/exception-64s.h

b/arch/powerpc/include/asm/exception-64s.h
index 47bd4ea0837d..b88cb3a989b6 100644

--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h

@@ -68,6 +68,10 @@
   *
   * The nop instructions allow us to insert one or more instructions to flush the
   * L1-D cache when returning to userspace or a guest.
+ *
+ * powerpc relies on return from interrupt/syscall being context synchronising
+ * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE
+ * without additional additional synchronisation instructions.

This file is dedicated to BOOK3S/64. What about other ones ?

On 32 bits, this is also valid as 'rfi' is also context synchronising,
but then why just add some comment in exception-64s.h and only there ?

Yeah you're right, I basically wanted to keep a note there just in case,
because it's possible we would get a less synchronising return (maybe
unlikely with meltdown) or even return from a kernel interrupt using a
something faster (e.g., bctar if we don't use tar register in the kernel
anywhere).

So I wonder where to add the note, entry_32.S and 64e.h as well?

For 64-bit powerpc, I would be tempted to either place the comment in the header
implementing the RFI_TO_USER and RFI_TO_USER_OR_KERNEL macros or the .S files
using them, e.g. either:

arch/powerpc/include/asm/exception-64e.h
arch/powerpc/include/asm/exception-64s.h

or

arch/powerpc/kernel/exceptions-64s.S
arch/powerpc/kernel/entry_64.S

And for 32-bit powerpc, AFAIU

arch/powerpc/kernel/entry_32.S

uses SYNC + RFI to return to user-space. RFI is defined in

arch/powerpc/include/asm/ppc_asm.h

So a comment either near the RFI define and its uses should work.

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I should actually change the comment for 64-bit because soft masked
interrupt replay is an interesting case. I thought it was okay (because
the IPI would cause a hard interrupt which does do the rfi) but that
should at least be written.

Yes.

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The context synchronisation happens before
the Linux IPI function is called, but for the purpose of membarrier I
think that is okay (the membarrier just needs to have caused a memory
barrier + context synchronistaion by the time it has done).

Can you point me to the code implementing this logic ?

It's mostly in arch/powerpc/kernel/exception-64s.S and 
powerpc/kernel/irq.c, but a lot of asm so easier to explain.

When any Linux code does local_irq_disable(), we set interrupts as 
software-masked in a per-cpu flag. When interrupts (including IPIs) come
in, the first thing we do is check that flag and if we are masked, then
record that the interrupt needs to be "replayed" in another per-cpu 
flag. The interrupt handler then exits back using RFI (which is context 
synchronising the CPU). Later, when the kernel code does 
local_irq_enable(), it checks the replay flag to see if anything needs 
to be done. At that point we basically just call the interrupt handler 
code like a normal function, and when that returns there is no context
synchronising instruction.

So membarrier IPI will always cause target CPUs to perform a context
synchronising instruction, but sometimes it happens before the IPI 
handler function runs.

Thanks,
Nick