Re: [PATCH v2 6/7] powerpc/dt_cpu_ftrs: Add MMA feature

Thanks, not sure where I got that name from but it's probably wrong in a few 
places. Will wait a bit in case there are any more comments and then respin 
the series to update the name.

- Alistair

On Wednesday, 20 May 2020 3:51:53 AM AEST Paul A. Clarke wrote:

On Tue, May 19, 2020 at 10:31:56AM +1000, Alistair Popple wrote:

quoted

Matrix multiple accumulate (MMA) is a new feature added to ISAv3.1 and

Conclusion is that this should be "Matrix-Multiply Assist", but then there
are a couple more below...

quoted

POWER10. Support on powernv can be selected via a firmware CPU device
tree feature which enables it via a PCR bit.

Signed-off-by: Alistair Popple <redacted>
---

 arch/powerpc/include/asm/reg.h    |  3 ++-
 arch/powerpc/kernel/dt_cpu_ftrs.c | 17 ++++++++++++++++-
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h

b/arch/powerpc/include/asm/reg.h index 1931b1142599..c446863a40cf 100644

--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h

@@ -479,7 +479,8 @@

 #define   PCR_VEC_DIS	(__MASK(63-0))	/* Vec. disable (bit NA since
 POWER8) */ #define   PCR_VSX_DIS	(__MASK(63-1))	/* VSX disable (bit NA
 since POWER8) */ #define   PCR_TM_DIS	(__MASK(63-2))	/* Trans. memory
 disable (POWER8) */> 
-#define   PCR_HIGH_BITS	(PCR_VEC_DIS | PCR_VSX_DIS | PCR_TM_DIS)
+#define   PCR_MMA_DIS	(__MASK(63-3)) /* Matrix-Multiply Accelerator */

also here.

quoted

+#define   PCR_HIGH_BITS	(PCR_MMA_DIS | PCR_VEC_DIS | PCR_VSX_DIS |
PCR_TM_DIS)> 
 /*
 
  * These bits are used in the function kvmppc_set_arch_compat() to
  specify and * determine both the compatibility level which we want to
  emulate and the> 

diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c

b/arch/powerpc/kernel/dt_cpu_ftrs.c index 93c340906aad..e7540ee5cad8
100644

--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c

@@ -75,6 +75,7 @@ static struct {

 	u64	lpcr_clear;
 	u64	hfscr;
 	u64	fscr;

+	u64	pcr;

 } system_registers;
 
 static void (*init_pmu_registers)(void);

@@ -102,7 +103,7 @@ static void __restore_cpu_cpufeatures(void)

 	if (hv_mode) {
 	
 		mtspr(SPRN_LPID, 0);
 		mtspr(SPRN_HFSCR, system_registers.hfscr);

-		mtspr(SPRN_PCR, PCR_MASK);
+		mtspr(SPRN_PCR, system_registers.pcr);

 	}
 	mtspr(SPRN_FSCR, system_registers.fscr);

@@ -555,6 +556,18 @@ static int __init feat_enable_large_ci(struct

dt_cpu_feature *f)> 
 	return 1;
 
 }

+static int __init feat_enable_mma(struct dt_cpu_feature *f)
+{
+	u64 pcr;
+
+	feat_enable(f);
+	pcr = mfspr(SPRN_PCR);
+	pcr &= ~PCR_MMA_DIS;
+	mtspr(SPRN_PCR, pcr);
+
+	return 1;
+}
+

 struct dt_cpu_feature_match {
 
 	const char *name;
 	int (*enable)(struct dt_cpu_feature *f);

@@ -629,6 +642,7 @@ static struct dt_cpu_feature_match __initdata

 	{"vector-binary16", feat_enable, 0},
 	{"wait-v3", feat_enable, 0},
 	{"prefix-instructions", feat_enable, 0},

+	{"matrix-multiply-accumulate", feat_enable_mma, 0},

and presumably here as well.

quoted

 };

PC