Re: [PATCH] arch/powerpc/64: Avoid isync in flush_dcache_range
From: Segher Boessenkool <hidden>
Date: 2020-03-20 15:09:44
On Fri, Mar 20, 2020 at 04:02:42PM +0530, Aneesh Kumar K.V wrote:
As per ISA and isync is only needed on instruction cache block invalidate. Remove the same from dcache invalidate.
Is that true on older CPUs? Segher