On Sun, 2020-02-09 at 18:14:42 UTC, Christophe Leroy wrote:

In ITLB miss handled the line supposed to clear bits 20-23 on the
L2 ITLB entry is buggy and does indeed nothing, leading to undefined
value which could allow execution when it shouldn't.

Properly do the clearing with the relevant instruction.

Fixes: 74fabcadfd43 ("powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 in TLB Miss handlers")
Cc: stable@vger.kernel.org
Signed-off-by: Christophe Leroy <redacted>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/a4031afb9d10d97f4d0285844abbc0ab04245304

cheers