Thread (9 messages) 9 messages, 3 authors, 2020-03-02

Re: [PATCH] powerpc/Kconfig: Make FSL_85XX_CACHE_SRAM configurable

From: Scott Wood <oss@buserror.net>
Date: 2020-01-21 05:54:43
Also in: lkml

On Tue, 2020-01-21 at 13:20 +0800, 王文虎 wrote:
From: Scott Wood <oss@buserror.net>
Date: 2020-01-21 11:25:25
To:  wangwenhu <redacted>,Kumar Gala <redacted>,
Benjamin Herrenschmidt [off-list ref],Paul Mackerras <
paulus@samba.org>,Michael Ellerman [off-list ref],
linuxppc-dev@lists.ozlabs.org,linux-kernel@vger.kernel.org
Cc:  trivial@kernel.org,wenhu.wang@vivo.com,Rai Harninder <
harninder.rai@nxp.com>
Subject: Re: [PATCH] powerpc/Kconfig: Make FSL_85XX_CACHE_SRAM
configurable>On Mon, 2020-01-20 at 06:43 -0800, wangwenhu wrote:
quoted
quoted
From: wangwenhu <redacted>

When generating .config file with menuconfig on Freescale BOOKE
SOC, FSL_85XX_CACHE_SRAM is not configurable for the lack of
description in the Kconfig field, which makes it impossible
to support L2Cache-Sram driver. Add a description to make it
configurable.

Signed-off-by: wangwenhu <redacted>
The intent was that drivers using the SRAM API would select the
symbol.  What
is the use case for selecting it manually?
With a repository of multiple products(meaning different defconfigs) and
multiple
developers, the Kconfigs of the Kernel Source Tree change frequently. So the
"make menuconfig"
process is needed for defconfigs' re-generating or updating for the
complexity of dependencies
between different features defined in the Kconfigs.
That doesn't answer my question of how the SRAM code would be useful other
than to some other driver that uses the API (which would use "select").  There
is no userspace API.  You could use the kernel command line to configure the
SRAM but you need to get the address of it for it to be useful.
quoted
Since this code was added almost ten years ago and there are still no (in-
tree?) users of the API, we should just remove the sram code (unless this
prods someone to submit such a user very soon).
Yes, pretty long a time. But we DO really use the API now for
PPCE500/Freescale SoC.
I do not see any users in the kernel tree.  Are you talking about out-of-tree
code, or something that you've submitted or will submit soon?  Or are you
accessing it via /dev/mem?
Like sometimes we need to reset the whole RAM, then the L2-Cache would be
used as
SRAM for backup using. Since it is useful for us now, a re-consideration is
recommanded.
Where is the code that would do this?

-Scott
  
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