-----Original Message-----
From: Andrew Murray <redacted>
Sent: 2019年9月16日 22:38
To: Xiaowei Bao <redacted>; robh+dt@kernel.org
Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo
Li [off-list ref]; kishon@ti.com; lorenzo.pieralisi@arm.com; M.h.
Lian [off-list ref]; Mingkai Hu [off-list ref]; Roy
Zang [off-list ref]; jingoohan1@gmail.com;
gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org;
arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou
[off-list ref]
Subject: Re: [PATCH v3 09/11] PCI: layerscape: Add EP mode support for
ls1088a and ls2088a

On Sat, Sep 14, 2019 at 04:10:22AM +0000, Xiaowei Bao wrote:

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-----Original Message-----
From: Andrew Murray <redacted>
Sent: 2019年9月12日 20:50
To: Xiaowei Bao <redacted>
Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org;
Leo Li [off-list ref]; kishon@ti.com; lorenzo.pieralisi@arm.com;

M.h.

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Lian [off-list ref]; Mingkai Hu [off-list ref]; Roy
Zang [off-list ref]; jingoohan1@gmail.com;
gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org;
arnd@arndb.de; gregkh@linuxfoundation.org; Z.q. Hou
[off-list ref]
Subject: Re: [PATCH v3 09/11] PCI: layerscape: Add EP mode support
for ls1088a and ls2088a

On Tue, Sep 03, 2019 at 01:47:36AM +0000, Xiaowei Bao wrote:

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-----Original Message-----
From: Andrew Murray <redacted>
Sent: 2019年9月2日 20:46
To: Xiaowei Bao <redacted>
Cc: robh+dt@kernel.org; mark.rutland@arm.com;
shawnguo@kernel.org; Leo Li [off-list ref]; kishon@ti.com;
lorenzo.pieralisi@arm.com;

M.h.

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Lian [off-list ref]; Mingkai Hu [off-list ref];
Roy Zang [off-list ref]; jingoohan1@gmail.com;
gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
linux-arm-kernel@lists.infradead.org;
linuxppc-dev@lists.ozlabs.org; arnd@arndb.de;
gregkh@linuxfoundation.org; Z.q. Hou [off-list ref]
Subject: Re: [PATCH v3 09/11] PCI: layerscape: Add EP mode
support for ls1088a and ls2088a

On Mon, Sep 02, 2019 at 11:17:14AM +0800, Xiaowei Bao wrote:

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Add PCIe EP mode support for ls1088a and ls2088a, there are
some difference between LS1 and LS2 platform, so refactor the
code of the EP driver.

Signed-off-by: Xiaowei Bao <redacted>
---
v2:
 - This is a new patch for supporting the ls1088a and ls2088a

platform.

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v3:
 - Adjust the some struct assignment order in probe function.

 drivers/pci/controller/dwc/pci-layerscape-ep.c | 72
+++++++++++++++++++-------
 1 file changed, 53 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c

b/drivers/pci/controller/dwc/pci-layerscape-ep.c
index 5f0cb99..723bbe5 100644

--- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
+++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c

@@ -20,27 +20,29 @@

 #define PCIE_DBI2_OFFSET		0x1000	/* DBI2 base address*/

-struct ls_pcie_ep {
-	struct dw_pcie		*pci;
-	struct pci_epc_features	*ls_epc;
+#define to_ls_pcie_ep(x)	dev_get_drvdata((x)->dev)
+
+struct ls_pcie_ep_drvdata {
+	u32				func_offset;
+	const struct dw_pcie_ep_ops	*ops;
+	const struct dw_pcie_ops	*dw_pcie_ops;
 };

-#define to_ls_pcie_ep(x)	dev_get_drvdata((x)->dev)
+struct ls_pcie_ep {
+	struct dw_pcie			*pci;
+	struct pci_epc_features		*ls_epc;
+	const struct ls_pcie_ep_drvdata *drvdata; };

 static int ls_pcie_establish_link(struct dw_pcie *pci)  {
 	return 0;
 }

-static const struct dw_pcie_ops ls_pcie_ep_ops = {
+static const struct dw_pcie_ops dw_ls_pcie_ep_ops = {
 	.start_link = ls_pcie_establish_link,  };

-static const struct of_device_id ls_pcie_ep_of_match[] = {
-	{ .compatible = "fsl,ls-pcie-ep",},
-	{ },
-};
-
 static const struct pci_epc_features*

ls_pcie_ep_get_features(struct dw_pcie_ep *ep)  { @@ -87,10
+89,39 @@ static int ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep,

u8 func_no,

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 	}
 }

-static const struct dw_pcie_ep_ops pcie_ep_ops = {
+static unsigned int ls_pcie_ep_func_conf_select(struct
+dw_pcie_ep

*ep,

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+						u8 func_no)
+{
+	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+	struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);
+
+	WARN_ON(func_no && !pcie->drvdata->func_offset);
+	return pcie->drvdata->func_offset * func_no; }
+
+static const struct dw_pcie_ep_ops ls_pcie_ep_ops = {
 	.ep_init = ls_pcie_ep_init,
 	.raise_irq = ls_pcie_ep_raise_irq,
 	.get_features = ls_pcie_ep_get_features,
+	.func_conf_select = ls_pcie_ep_func_conf_select, };
+
+static const struct ls_pcie_ep_drvdata ls1_ep_drvdata = {
+	.ops = &ls_pcie_ep_ops,
+	.dw_pcie_ops = &dw_ls_pcie_ep_ops, };
+
+static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = {
+	.func_offset = 0x20000,
+	.ops = &ls_pcie_ep_ops,
+	.dw_pcie_ops = &dw_ls_pcie_ep_ops, };
+
+static const struct of_device_id ls_pcie_ep_of_match[] = {
+	{ .compatible = "fsl,ls1046a-pcie-ep", .data =

&ls1_ep_drvdata },

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+	{ .compatible = "fsl,ls1088a-pcie-ep", .data =

&ls2_ep_drvdata },

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+	{ .compatible = "fsl,ls2088a-pcie-ep", .data =

&ls2_ep_drvdata },

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+	{ },

This removes support for "fsl,ls-pcie-ep" - was that
intentional? If you do plan to drop it please make sure you
explain why in the commit message. See also my comments in your

dt-binding patch.

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In fact, the u-boot will fixup the status property to 'status =
enabled' in PCI node of the DTS base on "fsl,ls-pcie-ep"
compatible, so "fsl,ls-pcie-ep" is used, I used this compatible
before, because the driver only support the LS1046a, but this
time, I add the LS1088a and LS2088a support, and these two boards
have some difference form

LS1046a, so I changed the compatible. I am not sure whether need to
add "fsl,ls-pcie-ep"

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in there, could you give some advice, thanks a lot.

It sounds like "fsl,ls-pcie-ep" can be a fallback for "fsl,ls1046a-pcie-ep".

This is not a fallback, the compatible "fsl,ls1046a-pcie-ep" is used
by bootloader, the bootloader will modify the status property, the
bootloader code get the
PCI_HEADER_TYPE(0xe) of config space to decide enable which node(EP or
RC) status property. At the beginning, we plan to use one compatible

"fsl,ls1046a-pcie-ep"

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support all NXP's platform, but actually, due to the difference of
each platform, it is difficult.

I've looked at the U-Boot source [1] and device trees, I think I understand
what happens here.

The DT describes disabled nodes for both fsl,lsXXXXX-pcie and
fsl,lxXXXXX-pcie-ep. U-Boot looks at the nodes and compares with the actual
PCI config space to determine the current hardware configuration type. It will
then *enable* either the RC or EP.

Yes, you are correct.

However U-Boot currently only looks for a compatible string with "fsl,ls-pcie"
or "fsl,ls-pcie-ep". This is why the DT needs to describe a PCI node as both
"fsl,lsXXXXX-pcie-ep" and "fsl,ls-pcie" - the first for kernel and the second for
the U-Boot. (The second is no longer needed by the kernel driver as you are
now using the more specific names).

The fact is that the compatible "fsl,ls-pcie-ep" is used for match the driver at first,
and community of opensource advice reserve the compatible "fsl,lsXXXXX-pcie-ep"
for other platforms, at present, the compatible "fsl,ls-pcie-ep" is also used to 
match the driver, and "fsl,lsXXXXX-pcie-ep" used to difference the platforms, please
refer to the drivers/pci/controller/dwc/pci-layerscape.c, it is similar.