Re: [PATCH] powerpc/book3s/mm: Clear MMU_FTR_HPTE_TABLE when radix is enabled.

On 5/16/19 10:34 AM, Nicholas Piggin wrote:

Aneesh Kumar K.V's on May 14, 2019 4:02 pm:

quoted

Avoids confusion when printing Oops message like below

  Faulting instruction address: 0xc00000000008bdb4
  Oops: Kernel access of bad area, sig: 11 [#1]
  LE PAGE_SIZE=64K MMU=Radix MMU=Hash SMP NR_CPUS=2048 NUMA PowerNV

Either ibm,pa-features or ibm,powerpc-cpu-features can be used to enable the
MMU features. We don't clear related MMU feature bits there. We use the kernel
commandline to determine what translation mode we want to use and clear the
HPTE or radix bit accordingly. On LPAR we do have to renable HASH bit if the
hypervisor can't do radix.

Well we have the HPTE feature: the CPU supports hash MMU mode. It's
just the the kernel is booted in radix mode.

We are not using mmu_features to indicate the capability of the hardware 
right? ie, mmu_features is an indication of current running config. We 
set MMU_FTR_TYPE_RADIX if the kernel is running in radix translation 
mode and on similar lines we should set MMU_FTR_HPTE_TABLE if the kernel 
is running in only hash translation mode. Whether the hardware support 
these translation mode is different from which mode is currently used.

Could make a difference for KVM, if it will support an HPT guest or
not.

kvm should not depend on MMU_FTR_HPTE_TABLE to identify whether the 
hardware supports hash page table translation. I don't think we do that.

That's all highly theoretical and we have other inconsistencies
already in this stuff, I'd just like to try make things a bit better
in the long term.

-aneesh