Re: [PATCH 17/19] KVM: PPC: Book3S HV: add get/set accessors for the VP XIVE state
flat view
From: David Gibson <hidden>
Date: 2019-02-05 05:41:48
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kvm
On Mon, Feb 04, 2019 at 07:57:26PM +0100, Cédric Le Goater wrote:
On 2/4/19 6:26 AM, David Gibson wrote:quoted
On Mon, Jan 07, 2019 at 08:10:04PM +0100, Cédric Le Goater wrote:quoted
At a VCPU level, the state of the thread context interrupt management registers needs to be collected. These registers are cached under the 'xive_saved_state.w01' field of the VCPU when the VPCU context is pulled from the HW thread. An OPAL call retrieves the backup of the IPB register in the NVT structure and merges it in the KVM state. The structures of the interface between QEMU and KVM provisions some extra room (two u64) for further extensions if more state needs to be transferred back to QEMU. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- arch/powerpc/include/asm/kvm_ppc.h | 5 ++ arch/powerpc/include/uapi/asm/kvm.h | 2 + arch/powerpc/kvm/book3s.c | 24 +++++++++ arch/powerpc/kvm/book3s_xive_native.c | 78 +++++++++++++++++++++++++++ 4 files changed, 109 insertions(+)diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h index 4cc897039485..49c488af168c 100644 --- a/arch/powerpc/include/asm/kvm_ppc.h +++ b/arch/powerpc/include/asm/kvm_ppc.h@@ -270,6 +270,7 @@ union kvmppc_one_reg { u64 addr; u64 length; } vpaval; + u64 xive_timaval[4]; }; struct kvmppc_ops {@@ -603,6 +604,8 @@ extern void kvmppc_xive_native_cleanup_vcpu(struct kvm_vcpu *vcpu); extern void kvmppc_xive_native_init_module(void); extern void kvmppc_xive_native_exit_module(void); extern int kvmppc_xive_native_hcall(struct kvm_vcpu *vcpu, u32 cmd); +extern int kvmppc_xive_native_get_vp(struct kvm_vcpu *vcpu, union kvmppc_one_reg *val); +extern int kvmppc_xive_native_set_vp(struct kvm_vcpu *vcpu, union kvmppc_one_reg *val); #else static inline int kvmppc_xive_set_xive(struct kvm *kvm, u32 irq, u32 server,@@ -637,6 +640,8 @@ static inline void kvmppc_xive_native_init_module(void) { } static inline void kvmppc_xive_native_exit_module(void) { } static inline int kvmppc_xive_native_hcall(struct kvm_vcpu *vcpu, u32 cmd) { return 0; } +static inline int kvmppc_xive_native_get_vp(struct kvm_vcpu *vcpu, union kvmppc_one_reg *val) { return 0; } +static inline int kvmppc_xive_native_set_vp(struct kvm_vcpu *vcpu, union kvmppc_one_reg *val) { return -ENOENT; }IIRC "VP" is the old name for "TCTX". Since we're using tctx in the rest of the XIVE code, can we use it here as well.OK. The state we are getting or setting is indeed related to the thread interrupt context registers. The name VP is related to an identifier to some interrupt context under OPAL (NVT in HW to be precise).
Oh, sorry, "NVT" was the name I was looking for, not "TCTX". But in any case, please lets standardize on one. -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
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