Thread (11 messages) flat view 11 messages, 2 authors, 2019-02-11
STALE2736d

Revision rfc of 2 in this series.

Revisions (2)
  1. rfc current
  2. v1 [diff vs current]

[RFC PATCH 1/5] powerpc: Add bitmasks for D-form instruction fields

From: Sandipan Das <hidden>
Date: 2019-02-04 04:23:28
Subsystem: linux for powerpc (32-bit and 64-bit), the rest · Maintainers: Madhavan Srinivasan, Linus Torvalds

This adds the bitmask definitions of D, SI and UI fields
found in D-form instructions.

Signed-off-by: Sandipan Das <redacted>
---
 arch/powerpc/include/asm/ppc-opcode.h | 3 +++
 1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 19a8834e0398..9bc7dd6116a7 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -403,6 +403,9 @@
 #define __PPC_CT(t)	(((t) & 0x0f) << 21)
 #define __PPC_SPR(r)	((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))
 #define __PPC_RC21	(0x1 << 10)
+#define __PPC_D(d)	((d) & 0xffff)
+#define __PPC_SI(i)	__PPC_D(i)
+#define __PPC_UI(i)	__PPC_D(i)
 
 /*
  * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
-- 
2.19.2
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