Thread (2 messages) 2 messages, 2 authors, 2018-10-17

What is an address translation in powerISA jarogn ?

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From: Raz <hidden>
Date: 2018-10-16 18:01:10

Section 5.7.3
"Storage accesses in real, hypervisor real, and virtual real
addressing modes are performed in a manner that depends on the
contents of MSR HV , VPM, VRMASD, HRMOR, RMLS, RMOR (see Chapter 2),
bit 0 of the
effective address (EA0),"

Hello
1. If MSR_IR = 0 and MSR_DR = 0, does it mean that addresses are not
translated by the MMU ?
2. If EA0 is the 63-rd bit of the effective address e address ? Does
this mean that the translation model is
   derived from the address ? a non privileged context may access
privileged memory.

thank you
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