Re: [RFC PATCH 07/11] powerpc/tm: Do not recheckpoint at sigreturn
From: Michael Neuling <hidden>
Date: 2018-09-18 05:32:21
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
Do not recheckpoint at signal code return. Just make sure TIF_RESTORE_TM =
is
set, which will restore on the exit to userspace by restore_tm_state.
Cool, but what about the same for reclaim? Why not avoid treclaim since it'= s done on entry? Mikey
=20 All the FP and VEC lazy restore was already done by tm_reclaim_current(), where it checked if FP/VEC was set, and filled out the ckfp and ckvr registers area to the expected value. =20 The current FP/VEC restoration is not necessary, since the transaction wi=
ll
quoted hunk ↗ jump to hunk
be aborted and the checkpointed values will be restore. =20 Signed-off-by: Breno Leitao <leitao@debian.org> --- arch/powerpc/kernel/signal_32.c | 23 +++-------------------- arch/powerpc/kernel/signal_64.c | 15 ++------------- 2 files changed, 5 insertions(+), 33 deletions(-) =20diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal=
_32.c
quoted hunk ↗ jump to hunk
index e6474a45cef5..4a1b17409bf3 100644--- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c@@ -850,28 +850,11 @@ static long restore_tm_user_regs(struct pt_regs *re=
gs,
quoted hunk ↗ jump to hunk
return 1; /* Pull in the MSR TM bits from the user context */ regs->msr =3D (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK); - /* Now, recheckpoint. This loads up all of the checkpointed (older) - * registers, including FP and V[S]Rs. After recheckpointing, the - * transactional versions should be loaded. - */ - tm_enable(); + /* Make sure the transaction is marked as failed */ current->thread.tm_texasr |=3D TEXASR_FS; - /* This loads the checkpointed FP/VEC state, if used */ - tm_recheckpoint(¤t->thread); - - /* This loads the speculative FP/VEC state, if used */ - msr_check_and_set(msr & (MSR_FP | MSR_VEC)); - if (msr & MSR_FP) { - load_fp_state(¤t->thread.fp_state); - regs->msr |=3D (MSR_FP | current->thread.fpexc_mode); - } -#ifdef CONFIG_ALTIVEC - if (msr & MSR_VEC) { - load_vr_state(¤t->thread.vr_state); - regs->msr |=3D MSR_VEC; - } -#endif + /* Make sure restore_tm_state will be called */ + set_thread_flag(TIF_RESTORE_TM); =20 return 0; }diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal=
_64.c
quoted hunk ↗ jump to hunk
index 83d51bf586c7..32402aa23a5e 100644--- a/arch/powerpc/kernel/signal_64.c +++ b/arch/powerpc/kernel/signal_64.c@@ -569,21 +569,10 @@ static long restore_tm_sigcontexts(struct task_stru=
ct
*tsk,
}
}
#endif
- tm_enable();
/* Make sure the transaction is marked as failed */
tsk->thread.tm_texasr |=3D TEXASR_FS;
- /* This loads the checkpointed FP/VEC state, if used */
- tm_recheckpoint(&tsk->thread);
-
- msr_check_and_set(msr & (MSR_FP | MSR_VEC));
- if (msr & MSR_FP) {
- load_fp_state(&tsk->thread.fp_state);
- regs->msr |=3D (MSR_FP | tsk->thread.fpexc_mode);
- }
- if (msr & MSR_VEC) {
- load_vr_state(&tsk->thread.vr_state);
- regs->msr |=3D MSR_VEC;
- }
+ /* Guarantee that restore_tm_state() will be called */
+ set_thread_flag(TIF_RESTORE_TM);
=20
return err;
}