From: David Gounaris <hidden> Date: 2018-08-28 11:15:41
Hello!
I have a 83xx platform and I am using non tsa mode in the fsl hdlc driver to enable ethernet over hdlc. These patches are the minimal changes that I needed to do in order to get it to work with our legacy products that used old FSL SDK driver. Please review.
Best Regards,
David Gounaris
David Gounaris (6):
net/wan/fsl_ucc_hdlc: allow ucc index up to 4
net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity
net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER
net/wan/fsl_ucc_hdlc: default hmask value
net/wan/fsl_ucc_hdlc: GUMR for non tsa mode
net/wan/fsl_ucc_hdlc: tx timeout handler
drivers/net/wan/fsl_ucc_hdlc.c | 23 +++++++++++++++++++++--
drivers/net/wan/fsl_ucc_hdlc.h | 2 +-
2 files changed, 22 insertions(+), 3 deletions(-)
--
2.13.6
From: David Gounaris <hidden> Date: 2018-08-28 11:15:41
The following bits in the GUMR is changed for non
tsa mode: CDS, CTSP and CTSS are set to zero.
When set, there is no tx interrupts from the controller.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 7 +++++++
1 file changed, 7 insertions(+)
@@ -97,6 +97,13 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)if(priv->tsa){uf_info->tsa=1;uf_info->ctsp=1;+uf_info->cds=1;+uf_info->ctss=1;+}+else{+uf_info->cds=0;+uf_info->ctsp=0;+uf_info->ctss=0;}/* This sets HPM register in CMXUCR register which configures a
From: David Gounaris <hidden> Date: 2018-08-28 11:15:41
Set default HMASK to 0x0000 to use
promiscuous mode in the hdlc controller.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: David Gounaris <hidden> Date: 2018-08-28 11:15:41
This was done to avoid discarding ethernet
packets when using HDLC_ETH protocol.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 6 ++++++
1 file changed, 6 insertions(+)
From: David Gounaris <hidden> Date: 2018-08-28 11:15:41
There is a need to allow higher indexes to be
able to support MPC83xx platforms. (UCC1-UCC5)
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: David Gounaris <redacted>
Date: 2018/8/28 19:09
quoted hunk
Subject: [PATCH 4/6] net/wan/fsl_ucc_hdlc: default hmask value
=20
Set default HMASK to 0x0000 to use
promiscuous mode in the hdlc controller.
=20
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
=20
It is not proper to set default HMASK to 0x0000, how about to add a new pro=
perty standing for hmask into device tree,
If get this property from dtb, then set it with the value from dtb, otherwi=
se, set it with default HMASK ox00ff?
Best Regards
Qiang Zhao
From: David Gounaris <redacted>
Date: 2018/8/28 19:09
quoted
Subject: [PATCH 4/6] net/wan/fsl_ucc_hdlc: default hmask value
Set default HMASK to 0x0000 to use
promiscuous mode in the hdlc controller.
Why do you need to do that ?
An HDLC frame encapsulating Ethernet should look like:
HDLC Frame includes:
– Opening Flag 7E hex
– Address field FF hex
– Control field 03 hex
– Information field Original Ethernet Packet, 1522 octets max.
– FCS CRC16 (2 bytes)
– Closing Flag 7E hex
What do you mean by 'promiscuous mode' ?
In any case, should a filter mask be changed for promiscuous mode, I
believe the change should be done at the time you enter promiscuous
mode, not at all time.
Christophe
It is not proper to set default HMASK to 0x0000, how about to add a new property standing for hmask into device tree,
If get this property from dtb, then set it with the value from dtb, otherwise, set it with default HMASK ox00ff?
Best Regards
Qiang Zhao
From: David Gounaris <hidden> Date: 2018-08-29 13:13:49
Here is what has been changed in v2 after the review comments.
v2-0001: Using UCC_MAX_NUM
v2-0002: Unchanged
v2-0003: Changed commit message
v2-0004: Adding fsl,hmask into the dt instead of changing the default value.
v2-0005: Unchanged
v2-0006: Unchanged
Adding robh+dt@kernel.org for comments regarding dt.
Best Regards
David Gounaris
David Gounaris (6):
net/wan/fsl_ucc_hdlc: allow ucc index up to 7
net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity
net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER
net/wan/fsl_ucc_hdlc: hmask
net/wan/fsl_ucc_hdlc: GUMR for non tsa mode
net/wan/fsl_ucc_hdlc: tx timeout handler
.../devicetree/bindings/soc/fsl/cpm_qe/network.txt | 6 +++++
drivers/net/wan/fsl_ucc_hdlc.c | 28 +++++++++++++++++++---
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
3 files changed, 32 insertions(+), 3 deletions(-)
--
2.13.6
From: David Gounaris <hidden> Date: 2018-08-29 13:13:51
There is a need to allow higher indexes to be
able to support MPC83xx platforms. (UCC1-UCC8)
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: David Gounaris <hidden> Date: 2018-08-29 13:13:55
This patch is to avoid discarding ethernet
packets when using HDLC_ETH protocol.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 6 ++++++
1 file changed, 6 insertions(+)
From: David Gounaris <hidden> Date: 2018-08-29 13:13:56
Ability to set hmask in the device-tree,
which can be used to change address
filtering of packets.
Signed-off-by: David Gounaris <redacted>
---
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 6 ++++++
drivers/net/wan/fsl_ucc_hdlc.c | 5 ++++-
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
3 files changed, 11 insertions(+), 1 deletion(-)
@@ -98,6 +98,12 @@ The property below is dependent on fsl,tdm-interface: usage: optional for tdm interface value type: <empty> Definition : Internal loopback connecting on TDM layer.+- fsl,hmask+ usage: optional+ Value type: <u16>+ Definition: HDLC address recognition. Set to zero to disable+ address filtering of packets:+ fsl,hmask = /bits/ 16 <0x0000>; Example for tdm interface:
From: David Gounaris <hidden> Date: 2018-08-29 13:13:57
The following bits in the GUMR is changed for non
tsa mode: CDS, CTSP and CTSS are set to zero.
When set, there is no tx interrupts from the controller.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 7 +++++++
1 file changed, 7 insertions(+)
@@ -97,6 +97,13 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)if(priv->tsa){uf_info->tsa=1;uf_info->ctsp=1;+uf_info->cds=1;+uf_info->ctss=1;+}+else{+uf_info->cds=0;+uf_info->ctsp=0;+uf_info->ctss=0;}/* This sets HPM register in CMXUCR register which configures a
@@ -781,7 +781,8 @@ static int ucc_hdlc_attach(struct net_device *dev, unsigned short encoding,if(parity!=PARITY_NONE&&parity!=PARITY_CRC32_PR1_CCITT&&-parity!=PARITY_CRC16_PR1_CCITT)+parity!=PARITY_CRC16_PR1_CCITT&&+parity!=PARITY_CRC16_PR0_CCITT)
ERROR:TRAILING_WHITESPACE: trailing whitespace
#20: FILE: drivers/net/wan/fsl_ucc_hdlc.c:783:
+^I parity != PARITY_CRC16_PR1_CCITT && $
Also, you could have left the line 'parity != PARITY_CRC16_PR1_CCITT)'
as is and just have added 'parity != PARITY_CRC16_PR0_CCITT &&' on the
previous line, would make more sense to have PR0 before PR1, and instead
of having 2+1- you would only have 1+
return -EINVAL;
priv->encoding = encoding;
---
L'absence de virus dans ce courrier électronique a été vérifiée par le logiciel antivirus Avast.
https://www.avast.com/antivirus
There is a need to allow higher indexes to be
able to support MPC83xx platforms. (UCC1-UCC8)
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
This patch is to avoid discarding ethernet
packets when using HDLC_ETH protocol.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 6 ++++++
1 file changed, 6 insertions(+)
@@ -513,6 +517,8 @@ static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit)break;caseARPHRD_PPP:+caseARPHRD_ETHER:+
ERROR:TRAILING_WHITESPACE: trailing whitespace
#34: FILE: drivers/net/wan/fsl_ucc_hdlc.c:520:
+^I^I^I$
Note that 'git show' would show it to you in red background so you
shouldn't miss it.
And this additional blank line is unnecessary.
Ability to set hmask in the device-tree,
which can be used to change address
filtering of packets.
Signed-off-by: David Gounaris <redacted>
---
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 6 ++++++
drivers/net/wan/fsl_ucc_hdlc.c | 5 ++++-
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
3 files changed, 11 insertions(+), 1 deletion(-)
@@ -98,6 +98,12 @@ The property below is dependent on fsl,tdm-interface: usage: optional for tdm interface value type: <empty> Definition : Internal loopback connecting on TDM layer.+- fsl,hmask+ usage: optional+ Value type: <u16>+ Definition: HDLC address recognition. Set to zero to disable+ address filtering of packets:+ fsl,hmask = /bits/ 16 <0x0000>; Example for tdm interface:
@@ -263,7 +263,7 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)iowrite16be(MAX_FRAME_LENGTH,&priv->ucc_pram->mflr);iowrite16be(DEFAULT_RFTHR,&priv->ucc_pram->rfthr);iowrite16be(DEFAULT_RFTHR,&priv->ucc_pram->rfcnt);-iowrite16be(DEFAULT_ADDR_MASK,&priv->ucc_pram->hmask);+iowrite16be(priv->hmask,&priv->ucc_pram->hmask);iowrite16be(DEFAULT_HDLC_ADDR,&priv->ucc_pram->haddr1);iowrite16be(DEFAULT_HDLC_ADDR,&priv->ucc_pram->haddr2);iowrite16be(DEFAULT_HDLC_ADDR,&priv->ucc_pram->haddr3);
@@ -1097,6 +1097,9 @@ static int ucc_hdlc_probe(struct platform_device *pdev)if(ret)gotofree_utdm;}+
ERROR:TRAILING_WHITESPACE: trailing whitespace
#51: FILE: drivers/net/wan/fsl_ucc_hdlc.c:1099:
+^I$
'git show' (or git log -p) would show it to you in red background.
quoted hunk
+ if (of_property_read_u16(np, "fsl,hmask", &uhdlc_priv->hmask))
+ uhdlc_priv->hmask = DEFAULT_ADDR_MASK;
ret = uhdlc_init(uhdlc_priv);
if (ret) {
The following bits in the GUMR is changed for non
tsa mode: CDS, CTSP and CTSS are set to zero.
When set, there is no tx interrupts from the controller.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 7 +++++++
1 file changed, 7 insertions(+)
ERROR:OPEN_BRACE: open brace '{' following function definitions go on
the next line
#22: FILE: drivers/net/wan/fsl_ucc_hdlc.c:1004:
+static void uhdlc_tx_timeout(struct net_device *ndev) {
+ netdev_err(ndev, "%s\n", __FUNCTION__);
WARNING:USE_FUNC: __func__ should be used instead of gcc specific
__FUNCTION__
#23: FILE: drivers/net/wan/fsl_ucc_hdlc.c:1005:
+ netdev_err(ndev, "%s\n", __FUNCTION__);
From: David Gounaris <hidden> Date: 2018-09-03 12:47:54
Ability to set hmask in the device-tree,
which can be used to change address
filtering of packets.
Signed-off-by: David Gounaris <redacted>
---
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt | 6 ++++++
drivers/net/wan/fsl_ucc_hdlc.c | 5 ++++-
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
3 files changed, 11 insertions(+), 1 deletion(-)
@@ -98,6 +98,12 @@ The property below is dependent on fsl,tdm-interface: usage: optional for tdm interface value type: <empty> Definition : Internal loopback connecting on TDM layer.+- fsl,hmask+ usage: optional+ Value type: <u16>+ Definition: HDLC address recognition. Set to zero to disable+ address filtering of packets:+ fsl,hmask = /bits/ 16 <0x0000>; Example for tdm interface:
From: David Gounaris <hidden> Date: 2018-09-03 12:47:54
This patch is to avoid discarding ethernet
packets when using HDLC_ETH protocol.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 5 +++++
1 file changed, 5 insertions(+)
From: David Gounaris <hidden> Date: 2018-09-03 12:47:54
Here is what has been changed in v3 after the review comments from v2.
v3-0001: corrected style problems
v3-0002: corrected style problems
v3-0003: corrected style problems
v3-0004: corrected style problems
v3-0005: corrected style problems
v3-0006: corrected style problems
Sorry for that, I did not know about scripts/checkpatch.pl.
David Gounaris (6):
net/wan/fsl_ucc_hdlc: allow ucc index up to 7
net/wan/fsl_ucc_hdlc: allow PARITY_CRC16_PR0_CCITT parity
net/wan/fsl_ucc_hdlc: Adding ARPHRD_ETHER
net/wan/fsl_ucc_hdlc: hmask
net/wan/fsl_ucc_hdlc: GUMR for non tsa mode
net/wan/fsl_ucc_hdlc: tx timeout handler
.../devicetree/bindings/soc/fsl/cpm_qe/network.txt | 6 +++++
drivers/net/wan/fsl_ucc_hdlc.c | 26 ++++++++++++++++++++--
drivers/net/wan/fsl_ucc_hdlc.h | 1 +
3 files changed, 31 insertions(+), 2 deletions(-)
--
2.13.6
From: David Gounaris <hidden> Date: 2018-09-03 12:47:54
There is a need to allow higher indexes to be
able to support MPC83xx platforms. (UCC1-UCC8)
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: David Gounaris <hidden> Date: 2018-09-03 12:48:00
The following bits in the GUMR is changed for non
tsa mode: CDS, CTSP and CTSS are set to zero.
When set, there is no tx interrupts from the controller.
Signed-off-by: David Gounaris <redacted>
---
drivers/net/wan/fsl_ucc_hdlc.c | 6 ++++++
1 file changed, 6 insertions(+)
@@ -97,6 +97,12 @@ static int uhdlc_init(struct ucc_hdlc_private *priv)if(priv->tsa){uf_info->tsa=1;uf_info->ctsp=1;+uf_info->cds=1;+uf_info->ctss=1;+}else{+uf_info->cds=0;+uf_info->ctsp=0;+uf_info->ctss=0;}/* This sets HPM register in CMXUCR register which configures a
Here is what has been changed in v3 after the review comments from v2.
v3-0001: corrected style problems
v3-0002: corrected style problems
v3-0003: corrected style problems
v3-0004: corrected style problems
v3-0005: corrected style problems
v3-0006: corrected style problems
Sorry for that, I did not know about scripts/checkpatch.pl.