Re: [RESEND][PATCH] powerpc/powernv : Save/Restore SPRG3 on entry/exit from stop.

On Fri, 2018-07-20 at 12:32 +1000, Michael Ellerman wrote:

Michael Neuling [off-list ref] writes:

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On Wed, 2018-07-18 at 13:42 +0530, Gautham R Shenoy wrote:

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On Wed, Jul 18, 2018 at 09:24:19AM +1000, Michael Neuling wrote:

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 	DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);

diff --git a/arch/powerpc/kernel/idle_book3s.S

b/arch/powerpc/kernel/idle_book3s.S
index d85d551..5069d42 100644

--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S

@@ -120,6 +120,9 @@ power9_save_additional_sprs:
 	mfspr	r4, SPRN_MMCR2
 	std	r3, STOP_MMCR1(r13)
 	std	r4, STOP_MMCR2(r13)
+
+	mfspr	r3, SPRN_SPRG3
+	std	r3, STOP_SPRG3(r13)

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We don't need to save it.  Just restore it from paca->sprg_vdso whi=

ch

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should
never change.

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Ok. I will respin a patch to restore SPRG3 from paca->sprg_vdso.
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How can we do better at catching these missing SPRGs?

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We can go through the list of SPRs from the POWER9 User Manual and
document explicitly why we don't have to save/restore certain SPRs
during the execution of the stop instruction. Does this sound ok ?
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(Ref: Table 4-8, Section 4.7.3.4 from the POWER9 User Manual
accessible from
https://openpowerfoundation.org/?resource_lib=3Dpower9-processor-user=

s-manua

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l)

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I was thinking of a boot time test case built into linux. linux has som=

e

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boot
time test cases which you can enable via CONFIG options.
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Firstly you could see if an SPR exists using the same trick xmon does i=

n

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dump_one_spr(). Then once you have a list of usable SPRs, you could wri=

te

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all
the known ones (I assume you'd have to leave out some, like the PSSCR),=

 then

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set

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Write what value?
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Ideally you want to write a random bit pattern to reduce the chance
that only some bits are being restored.

The xmon dump_one_spr() trick tries to work around that by writing one rand=
om
value and then a different one to see if it really is a nop.

But you can't do that because writing a value to an SPRs has an effect.

Sure that's a concern but xmon seems to get away with it.

Some of them might even need to be zero, in which case you can't really
distinguish that from a non-restored zero.

It doesn't need to be perfect. It just needs to catch more than we have now=
.

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the appropriate stop level, make sure you got into that stop level, and=

 then

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see
if that register was changed. Then you'd have an automated list of regi=

sters

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you
need to make sure you save/restore at each stop level.
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Could something like that work?

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Maybe.
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Ignoring the problem of whether you can write a meaningful value to some
of the SPRs, I'm not entirely convinced it's going to work. But maybe
I'm wrong.

Yeah, I'm not convinced it'll work either but it would be a nice piece of t=
est
infrastructure to have if it does work.

We'd still need to marry up the SPR numbers we get from the test to what's
actually being restored in Linux.

But there's a much simpler solution, we should 1) have a selftest for
getcpu() and 2) we should be running the glibc (I think?) test suite
that found this in the first place. It's frankly embarrassing that we
didn't find this.

Yeah, we should do that also, but how do we catch the next SPR we are missi=
ng.
I'd like some systematic way of doing that rather than wack-a-mole.

Mikey