Re: [PATCH V2 4/4] powerpc/mm/radix: Change pte relax sequence to handle nest MMU hang

On Tue, 29 May 2018 19:58:41 +0530
"Aneesh Kumar K.V" [off-list ref] wrote:

When relaxing access (read -> read_write update), pte needs to be marked invalid
to handle a nest MMU bug. We also need to do a tlb flush after the pte is
marked invalid before updating the pte with new access bits.

We also move tlb flush to platform specific __ptep_set_access_flags. This will
help us to gerid of unnecessary tlb flush on BOOK3S 64 later. We don't do that
in this patch. This also helps in avoiding multiple tlbies with coprocessor
attached.

I thought you should move this part of the change back into patch 3 as
well.

Thanks,
Nick