Thread (6 messages) 6 messages, 2 authors, 2018-03-28

Re: [v2] powerpc/perf: Fix kernel address leaks via Sampling registers

From: Michael Ellerman <hidden>
Date: 2018-03-28 14:13:27

On Wed, 2018-03-21 at 11:40:24 UTC, Madhavan Srinivasan wrote:
From: Michael Ellerman <mpe@ellerman.id.au>

Current code in power_pmu_disable() does not clear the sampling
registers like Sampling Instruction Address Register (SAIR) and
Sampling Data Address Register (SDAR) after disabling the PMU.
Since these are userspace readable and could contain kernel
address, add code to explicitly clear the content of these registers.
Patch also adds a "context synchronizing instruction" to enforce
no further updates to these registers as mandated by PowerISA.

"If an mtspr instruction is executed that changes the
value of a Performance Monitor register other than
SIAR, SDAR, and SIER, the change is not guaranteed
to have taken effect until after a subsequent context
synchronizing instruction has been executed (see
Chapter 11. "Synchronization Requirements for Con-
text Alterations" on page 1133)."

Signed-off-by: Madhavan Srinivasan <redacted>
Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/e1ebd0e5b9d0a10ba65e63a3514b6d

cheers
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