Re: [V6] cxl: Fix timebase synchronization status on P9

On Tue, 2018-02-20 at 13:48:56 UTC, Christophe Lombard wrote:

The PSL Timebase register is updated by the PSL to maintain the
timebase.
On P9, the Timebase value is only provided by the CAPP as received
the last time a timebase request was performed.
The timebase requests are initiated through the adapter configuration or
application registers.
The specific sysfs entry "/sys/class/cxl/cardxx/psl_timebase_synced" is
now dynamically updated according the content of the PSL Timebase
register.

Signed-off-by: Christophe Lombard <redacted>
Reviewed-by: Vaibhav Jain <redacted>
Acked-by: Andrew Donnellan <redacted>
Acked-by: Frederic Barrat <redacted>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/c2be663d5307fb9751a562ac664fa7

cheers