On Thu, 2017-09-07 at 17:11:12 UTC, Anton Blanchard wrote:
From: Anton Blanchard <redacted>
The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.
Exposing it via sysfs allows us to tune it at run time.
Signed-off-by: Anton Blanchard <redacted>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/b6d34eb4d280c893d0f442f4b9e039
cheers