On Sun, Jan 14, 2018 at 11:34:37PM +0100, Maciej S. Szmigiero wrote:

quoted

+	/* Check if the opposite stream is active */
+	aactive = ssi->streams & BIT(!dir);

				     ^
Here an implicit assumption that either RX == 0, TX == 1 or
RX == 1, TX == 0 still remains.

I would try to get rid of this !dir. However the regvals is
defined as regvals[2] so this assumption (either RX == 0 or
TX == 0) doesn't look wrong to me. I would prefer to add a
comment to limit a potential modification to RX and TX.