Thread (7 messages) flat view 7 messages, 5 authors, 2017-08-30

Re: [PATCH] cxl: Set the valid bit in PE for dedicated mode

From: christophe lombard <hidden>
Date: 2017-08-28 08:58:19

Le 28/08/2017 à 06:15, Vaibhav Jain a écrit :
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.
Acked-by:  Christophe Lombard <redacted>
quoted hunk ↗ jump to hunk
Signed-off-by: Vaibhav Jain <redacted>
---
  drivers/misc/cxl/native.c | 4 ++++
  1 file changed, 4 insertions(+)
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..0e748c682ee9 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,10 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
  	if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
  		afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);

+	ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+	/* Make sure the changes to the PE are visible to the card */
+	smp_wmb();
+
  	result = cxl_ops->afu_reset(afu);
  	if (result)
  		return result;
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