On Wed, 2017-05-03 at 17:34 +1000, Nicholas Piggin wrote:
Extending the soft IRQ disable to cover PMU interrupts will allow this
hard disable to be removed from hash based kernels too, but they will
still have to soft-disable PMU interrupts.
- Q1: Can we do this? It gives nice profiles of context switch code
rather than assigning it all to local_irq_enable.
Probably ok with radix yes.
- Q2: What is the unrecoverable SLB miss on exception entry? Is there
anywhere we access the kernel stack with RI disabled? Something else?
Not sure what you mean by Q2, but the original problem is an occurrence
of what we call the 'megabug' which hit us in different forms over the
years, and happens when we get a kernel stack SLB entry wrong.
Normally, the segment containing the current kernel stack is always
bolted in the SLB in a specific slot. If we accidentally lose that
"bolt", we can end up faulting it into the wrong slot, thus making it
possible for it to get evicted later on etc...
That in turns hits the exception return path which accesses the kernel
stack after clearing RI and setting SRR0/1 to the return values.
Cheers,
Ben.