Testing the QE's UCC for our HDLC bus I noticed a few odd things and I have
fixed these in these 3 patches.
Valentin Longchamp (3):
soc/fsl/qe: round brg_freq to 1kHz granularity
soc/fsl/qe: only apply QE_General4 workaround on affected SoCs
soc/fsl/qe: add EXPORT_SYMBOL for the 2 qe_tdm functions
drivers/soc/fsl/qe/qe.c | 21 +++++++++++++++++++--
drivers/soc/fsl/qe/qe_tdm.c | 2 ++
2 files changed, 21 insertions(+), 2 deletions(-)
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1.8.3.1