[PATCH 2/2] cxl: Set VPD timeout to avoid access failures
From: Matthew R. Ochs <hidden>
Date: 2016-11-21 21:10:16
Also in:
linux-pci
Subsystem:
char and misc drivers, the rest · Maintainers:
Arnd Bergmann, Greg Kroah-Hartman, Linus Torvalds
Some IBM CXL devices can take up to ~120ms to complete a VPD access transaction when under heavy load. With an existing default VPD timeout of 50ms, reads/writes can fail despite there not being an issue with the underlying hardware. To avoid these false failures, increase the VPD wait timeout for certain CXL devices to a value that allows appropriate VPD access delay when faced with a worst-case scenario. Signed-off-by: Matthew R. Ochs <redacted> --- drivers/misc/cxl/pci.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index e96be9c..56a67cf 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c@@ -1675,6 +1675,10 @@ bool cxl_slot_is_supported(struct pci_dev *dev, int flags) } EXPORT_SYMBOL_GPL(cxl_slot_is_supported); +static bool cxl_pci_is_slow_vpd_device(struct pci_dev *dev) +{ + return dev->device == 0x0601; +} static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id) {
@@ -1692,6 +1696,9 @@ static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id) return -ENODEV; } + if (cxl_pci_is_slow_vpd_device(dev)) + pci_set_vpd_timeout(dev, msecs_to_jiffies(125)); + if (cxl_verbose) dump_cxl_config_space(dev);
--
2.1.0