On 10/11/16 18:54, Gautham R. Shenoy wrote:

From: "Gautham R. Shenoy" <redacted>

Currently all the low-power idle states are expected to wake up
at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
that puts the CPU to an idle state and never returns.

On ISA_300, when the ESL and EC bits in the PSSCR are zero, the
CPU is expected to wake up at the next instruction of the idle
instruction.

This patch adds a new macro named IDLE_STATE_ENTER_SEQ_NORET for the

I think something like IDLE_STATE_ENTER_SEQ_LOSE_CTX would be better?

no-return variant and reuses the name IDLE_STATE_ENTER_SEQ
for a variant that allows resuming operation at the instruction next
to the idle-instruction.

<snip>

+
+#define	IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST)			\
+	IDLE_STATE_ENTER_SEQ(IDLE_INST)                         \

So we start off with both as the same?

 	b	.
 #endif /* CONFIG_PPC_P7_NAP */

<snip>
Balbir