[PATCH v11 12/27] powerpc/ptrace: Enable support for Performance Monitor registers
From: <hidden>
Date: 2016-07-17 02:02:26
Also in:
lkml
Subsystem:
linux for powerpc (32-bit and 64-bit), ptrace support, the rest · Maintainers:
Madhavan Srinivasan, Michael Ellerman, Oleg Nesterov, Linus Torvalds
From: Anshuman Khandual <redacted> This patch enables support for Performance monitor registers related ELF core note NT_PPC_PMU based ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved through adding one new register sets REGSET_PMU in powerpc corresponding to the ELF core note sections added in this regard. It also implements the get, set and active functions for this new register sets added. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <redacted> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Shuah Khan <redacted> Cc: Anton Blanchard <redacted> Cc: Cyril Bur <redacted> Cc: Anshuman Khandual <redacted> Cc: Simon Guo <redacted> Cc: Ulrich Weigand <redacted> Cc: Michael Neuling <redacted> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Kees Cook <redacted> Cc: Rashmica Gupta <redacted> Cc: Khem Raj <redacted> Cc: Jessica Yu <redacted> Cc: Jiri Kosina <redacted> Cc: Miroslav Benes <mbenes@suse.cz> Cc: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Cc: Chris Smart <redacted> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Signed-off-by: Anshuman Khandual <redacted> Signed-off-by: Simon Guo <redacted> --- arch/powerpc/include/uapi/asm/elf.h | 3 +- arch/powerpc/kernel/ptrace.c | 75 +++++++++++++++++++++++++++++++++++++ 2 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
index 8c4d71a..3a9e44c 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h@@ -94,7 +94,8 @@ #define ELF_NVMX 34 /* includes all vector registers */ #define ELF_NVSX 32 /* includes all VSX registers */ #define ELF_NTMSPRREG 3 /* include tfhar, tfiar, texasr */ -#define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */ +#define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */ +#define ELF_NPMU 5 /* includes siar, sdar, sier, mmcr2, mmcr0 */ typedef unsigned long elf_greg_t64; typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 52c69ed..536643b 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c@@ -1591,6 +1591,75 @@ static int ebb_set(struct task_struct *target, return ret; } +static int pmu_active(struct task_struct *target, + const struct user_regset *regset) +{ + if (!cpu_has_feature(CPU_FTR_ARCH_207S)) + return -ENODEV; + + return regset->n; +} + +static int pmu_get(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) +{ + /* Build tests */ + BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar)); + BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier)); + BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2)); + BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0)); + + if (!cpu_has_feature(CPU_FTR_ARCH_207S)) + return -ENODEV; + + return user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &target->thread.siar, 0, + 5 * sizeof(unsigned long)); +} + +static int pmu_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int ret = 0; + + /* Build tests */ + BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar)); + BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier)); + BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2)); + BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0)); + + if (!cpu_has_feature(CPU_FTR_ARCH_207S)) + return -ENODEV; + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.siar, 0, + sizeof(unsigned long)); + + if (!ret) + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.sdar, sizeof(unsigned long), + 2 * sizeof(unsigned long)); + + if (!ret) + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.sier, 2 * sizeof(unsigned long), + 3 * sizeof(unsigned long)); + + if (!ret) + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.mmcr2, 3 * sizeof(unsigned long), + 4 * sizeof(unsigned long)); + + if (!ret) + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.mmcr0, 4 * sizeof(unsigned long), + 5 * sizeof(unsigned long)); + return ret; +} #endif /* * These are our native regset flavors.
@@ -1624,6 +1693,7 @@ enum powerpc_regset { #ifdef CONFIG_PPC_BOOK3S_64 REGSET_TAR, /* TAR register */ REGSET_EBB, /* EBB registers */ + REGSET_PMR, /* Performance Monitor Registers */ #endif };
@@ -1724,6 +1794,11 @@ static const struct user_regset native_regsets[] = { .size = sizeof(u64), .align = sizeof(u64), .active = ebb_active, .get = ebb_get, .set = ebb_set }, + [REGSET_PMR] = { + .core_note_type = NT_PPC_PMU, .n = ELF_NPMU, + .size = sizeof(u64), .align = sizeof(u64), + .active = pmu_active, .get = pmu_get, .set = pmu_set + }, #endif };
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1.8.3.1