Thread (3 messages) flat view 3 messages, 2 authors, 2016-06-22

Re: [PATCH 3/3] powerpc/pnv/pci: Fix incorrect PE reservation attempt on some 64-bit BARs

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2016-06-22 15:43:32

On Wed, 2016-06-22 at 20:32 +1000, Gavin Shan wrote:
In pci_read_bridge_mmio_pref(), no prefetchable window (64bits+pref)
is populated if bit PCI_PREF_RANGE_TYPE_64 (0x1) isn't set on PCI
config register (PCI_PREF_MEMORY_BASE, 0x24). During the resource
resizing and assigning stage in PCI core, all resources including
64-bits prefetchable resources will be covered by 32-bits bridge
window.
Yeah ok, that's it, thanks !

Cheers,
Ben.
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