RE: [v8, 1/7] Documentation: DT: update Freescale DCFG compatible
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: 2016-04-26 02:43:18
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linux-arm-kernel, linux-clk, linux-devicetree, linux-i2c, linux-iommu, linux-mmc, lkml, netdev
Hi Mark,
-----Original Message----- From: Mark Rutland [mailto:mark.rutland@arm.com] Sent: Friday, April 22, 2016 9:12 PM To: Yangbo Lu Cc: linux-mmc@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- kernel@vger.kernel.org; linux-clk@vger.kernel.org; linux- i2c@vger.kernel.org; iommu@lists.linux-foundation.org; netdev@vger.kernel.org; ulf.hansson@linaro.org; Scott Wood; Rob Herring; Russell King; Jochen Friedrich; Joerg Roedel; Claudiu Manoil; Bhupesh Sharma; Zhao Qiang; Kumar Gala; Santosh Shilimkar; Yang-Leo Li; Xiaobo Xie Subject: Re: [v8, 1/7] Documentation: DT: update Freescale DCFG compatible =20 On Fri, Apr 22, 2016 at 02:27:38PM +0800, Yangbo Lu wrote:quoted
Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead of 'fsl,ls1021a-dcfg' to include more chips. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> --- Changes for v8: - Added this patch --- Documentation/devicetree/bindings/arm/fsl.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/Documentation/devicetree/bindings/arm/fsl.txtb/Documentation/devicetree/bindings/arm/fsl.txt index 752a685..1d5f512 100644--- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt@@ -119,7 +119,7 @@ Freescale DCFG configuration and status for the device. Such as setting thesecondary core start address and release the secondary core fromholdoff and startup.quoted
Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: should be "fsl,<chip>-dcfg"=20 Please list specific values expected for <chip>, while jusy saying <chip> may be more generic, it makes it practically impossible to search for the correct binding given a compatible string, and it's vague as to exaclty what <chip> should be.
[Lu Yangbo-B47093] Thanks for your comment. I will list the possible chips.
=20 Thanks, Mark. =20 =20 =20quoted
- reg : should contain base address and length of DCFG memory-mapped registers Example: -- 2.1.0.27.g96db324 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html