Re: [PATCH v2 2/2] cxl: Configure the PSL for two CAPI ports on POWER8NVL
From: Ian Munsie <hidden>
Date: 2016-03-24 20:49:18
Acked-by: Ian Munsie <redacted>
- [PATCH v2 1/2] powerpc: Define PVR value for POWER8NVL processor · Philippe Bergheaud <hidden> · 2016-03-16
- [PATCH v2 2/2] cxl: Configure the PSL for two CAPI ports on POWER8NVL · Philippe Bergheaud <hidden> · 2016-03-16
- Re: [PATCH v2 2/2] cxl: Configure the PSL for two CAPI ports on POWER8NVL · Ian Munsie <hidden> · 2016-03-24
- Re: [v2,2/2] cxl: Configure the PSL for two CAPI ports on POWER8NVL · Michael Ellerman <mpe@ellerman.id.au> · 2016-03-30
- Re: [PATCH v2 1/2] powerpc: Define PVR value for POWER8NVL processor · Ian Munsie <hidden> · 2016-03-24
- Re: [v2,1/2] powerpc: Define PVR value for POWER8NVL processor · Michael Ellerman <mpe@ellerman.id.au> · 2016-03-25