Re: cxl: Fix PSL timebase synchronization detection
From: Michael Ellerman <mpe@ellerman.id.au>
Date: 2016-02-29 11:01:44
From: Michael Ellerman <mpe@ellerman.id.au>
Date: 2016-02-29 11:01:44
On Wed, 2016-24-02 at 17:27:51 UTC, Frederic Barrat wrote:
The PSL timebase synchronization is seemingly failing for configuration not including VIRT_CPU_ACCOUNTING_NATIVE. The driver shows the following trace in dmesg: PSL: Timebase sync: giving up! The PSL timebase register is actually syncing correctly, but the cxl driver is not detecting it. Fix is to use the proper timebase-to-time conversion. Signed-off-by: Frederic Barrat <redacted> Cc: <redacted> # 4.3+ Acked-by: Michael Neuling <redacted> Reviewed-by: Matthew R. Ochs <redacted> Acked-by: Ian Munsie <redacted> Reviewed-by: Andrew Donnellan <redacted> Reviewed-by: Vaibhav Jain <redacted>
Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/923adb1646d5ba739d2a1e63ee cheers