On Wed, Dec 2, 2015 at 8:12 PM, Denis Kirjanov [off-list ref] 
wrote:

On 11/20/15, Chenhui Zhao [off-list ref] wrote:

quoted

 On e6500, in the case of cpu hotplug, either thread in one core
 may be the first thread initilzing the TLB1. The subsequent threads
 must not setup it again.

 The code is derived from the comment of Scott Wood.

 Signed-off-by: Chenhui Zhao [off-list ref]
 ---
  arch/powerpc/include/asm/cputhreads.h | 7 +++++++
  arch/powerpc/mm/tlb_nohash.c          | 4 +---
  2 files changed, 8 insertions(+), 3 deletions(-)

 diff --git a/arch/powerpc/include/asm/cputhreads.h
 b/arch/powerpc/include/asm/cputhreads.h
 index ba42e46..b56cece 100644
 --- a/arch/powerpc/include/asm/cputhreads.h
 +++ b/arch/powerpc/include/asm/cputhreads.h
 @@ -94,6 +94,13 @@ static inline int cpu_last_thread_sibling(int 
cpu)
  	return cpu | (threads_per_core - 1);
  }

 +static inline u32 get_tensr(void)
 +{
 +	if (cpu_has_feature(CPU_FTR_SMT))
 +		return mfspr(SPRN_TENSR);
 +	else
 +		return 1;
 +}

If i get it right, SPRN_TENSR used in the code only if CONFIG_PPC64
is defined. Then we can make it noop on ppc32.

Thanks!

Yeah, SPRN_TENSR is defined when CONFIG_BOOKE or CONFIG_40x is enabled. 
I'd like to change the code like:

static inline u32 get_tensr(void)
{
#ifdef CONFIG_BOOKE
        if (cpu_has_feature(CPU_FTR_SMT))
                return mfspr(SPRN_TENSR);
#endif
        return 1;
}

Thanks,
Chenhui