Thread (1 message) 1 message, 1 author, 2015-11-13

Re: [PATCH v7 39/50] powerpc/powernv: Fundamental reset in pnv_pci_reset_secondary_bus()

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2015-11-13 00:23:23
Also in: linux-devicetree, linux-pci

On Fri, 2015-11-13 at 11:08 +1100, Daniel Axtens wrote:
Gavin Shan [off-list ref] writes:
quoted
 void pnv_pci_reset_secondary_bus(struct pci_dev *dev)
 {
-> > 	> > pnv_eeh_bridge_reset(dev, EEH_RESET_HOT);
+> > 	> > int option, freset = 0;
+
+> > 	> > if (dev->subordinate)
+> > 	> > 	> > pci_walk_bus(dev->subordinate,
+> > 	> > 	> > 	> >      pnv_pci_dev_reset_type, &freset);
+
+> > 	> > option = freset ? EEH_RESET_FUNDAMENTAL : EEH_RESET_HOT;
+> > 	> > pnv_eeh_bridge_reset(dev, option);
According to the skiboot sources, fundamental reset isn't supported on
p5ioc2. As far as I can tell from your corresponding skiboot patches,
this is still the case after they are applied. Do we need a fallback to
EEH_RESET_HOT in this case? Otherwise there will be no reset performed
at all.
We don't really care that much about what happens on p5ioc2 :-)
Likewise, if the FUNDAMENTAL reset fails for any reason, should we fall
back to a HOT reset?
Probably.

Cheers,
Ben.
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