On Tue, 2015-10-27 at 19:30 -0700, Nishanth Aravamudan wrote:

On 28.10.2015 [11:20:05 +0900], Benjamin Herrenschmidt wrote:

quoted

On Tue, 2015-10-27 at 18:54 -0700, Nishanth Aravamudan wrote:

quoted

In "bypass" mode, what TCE size is used? Is it guaranteed to be
4K?

None :-) The TCEs are completely bypassed. You get a N:M linear
mapping
of all memory starting at 1<<59 PCI side.

Err, duh, sorry! Ok, so in that case, DMA page shift is PAGE_SHIFT,
then?

I think so.

Cheers,
Ben.