On Tue, 2015-05-26 at 13:57 +0000, David Laight wrote:

From: Scott Wood ...

quoted

quoted

I'd also have thought that the 64bit C version above would be 
generally 'good'.

It doesn't generate the addc/addze sequence.  At least with GCC 
4.8.2,
it does something like:

    mr      tmp0, csum
    li      tmp1, 0
    li      tmp2, 0
    addc    tmp3, addend, tmp0
    adde    csum, tmp2, tmp1
    add     csum, csum, tmp3

I was thinking of all 64bit targets, not 32bit ones.

Oh, you mean move it out of arch/powerpc?  Sounds reasonable, but 
someone should probably check what the resulting code looks like on 
other common arches.  OTOH, if we're going to modify non-arch code, 
that might be a good opportunity to implement Segher's suggestion and 
move to a 64-bit accumulator.

-Scott